TY  - JOUR

T1  - Static CMOS latch-up considerations in HVIC design

JO  - IEEE Journal of Solid-State Circuits

PY  - 1990/01/01

AU  - Huang Q

AU  - Amaratunga GAJ

AU  - Narayanan EMS

AU  - Milne WI

ED  - 

DO  - DOI: 10.1109/4.52192

PB  - Institute of Electrical and Electronics Engineers (IEEE)

VL  - 25

IS  - 2

SP  - 613

EP  - 616

Y2  - 2024/10/23

ER  -